1. Field of the Invention
The present invention relates to semiconductor device fabrication, and more particularly, to a method for forming a high-voltage device having high breakdown voltage and a one-sided gate structure.
2. Description of the Prior Art
As the scale of integrated circuits (ICs) has been rapidly decreased, the short channel effect and the hot carrier problem make the design of the ICs more difficult, if not impossible. Therefore, some methods such as lightly-doped drain (LDD) process were disclosed to solve these problems. However, none of these methods solves energy loss and heat dissipation problems.
FIG. 1 shows the cross-section of a conventional complementary metal oxide semiconductor (CMOS) transistor, which usually includes a p-type substrate 10, field oxide regions 4, an n+ source region 2, an n+ drain region 2A, a gate region 3, and an oxide layer 5.
In the structure of the shown transistor, especially of a high-voltage CMOS transistor, the carriers are apt to drift into the substrate 10, disadvantageously incurring bipolar effect. Furthermore, as the length of the channel is decreased, the hot electron effect occurs in addition to the decline of threshold voltage, totally affecting the normal function of the transistors.
Referring back to FIG. 1, it is noted that the traditional high-voltage CMOS transistor includes two-sided field oxide regions 4, which are primarily used to improve the breakdown voltage. Unfortunately, this two-sided field oxide structure decreases driving capability of current. Furthermore, this structure results in an unwanted lateral bipolar junction, reducing its snap-back voltage. Moreover, the area occupied by the two-sided field oxide regions disadvantageously consumes more chip area, making high integration of the circuits impossible. For the foregoing reasons, there is a need for a method of fabricating a semiconductor device having high breakdown voltage while maintaining its current driving capability.